dc.identifier.uri |
http://dx.doi.org/10.15488/9546 |
|
dc.identifier.uri |
https://www.repo.uni-hannover.de/handle/123456789/9600 |
|
dc.contributor.author |
Sedaghat Maman, Reza
|
ger |
dc.date.accessioned |
2020-03-12T18:05:42Z |
|
dc.date.available |
2020-03-12T18:05:42Z |
|
dc.date.issued |
1999 |
|
dc.identifier.citation |
Sedaghat Maman, Reza: Fault emulation : reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping. Hannover : Universität Hannover, Diss., 1999, 128 S. |
ger |
dc.description.abstract |
[no abstract] |
ger |
dc.language.iso |
eng |
eng |
dc.publisher |
Hannover : Universität Hannover |
|
dc.rights |
Es gilt deutsches Urheberrecht. Das Dokument darf zum eigenen Gebrauch kostenfrei genutzt, aber nicht im Internet bereitgestellt oder an Außenstehende weitergegeben werden. |
ger |
dc.subject |
Emulation |
ger |
dc.subject |
Fehlersimulation |
ger |
dc.subject |
Field programmable gate array |
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dc.subject.ddc |
004 | Informatik
|
ger |
dc.title |
Fault emulation : reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping |
eng |
dc.type |
DoctoralThesis |
ger |
dc.type |
Text |
ger |
dc.relation.urn |
urn:nbn:de:gbv:089-3084374462 |
|
dcterms.extent |
128 S. |
|
dc.description.version |
publishedVersion |
ger |
tib.accessRights |
frei zug�nglich |
ger |