dc.identifier.uri |
http://dx.doi.org/10.15488/1925 |
|
dc.identifier.uri |
http://www.repo.uni-hannover.de/handle/123456789/1950 |
|
dc.contributor.author |
Grabowski, Darius
|
|
dc.contributor.author |
Platte, Daniel
|
|
dc.contributor.author |
Hedrich, Lars
|
|
dc.contributor.author |
Barke, Erich
|
|
dc.date.accessioned |
2017-09-14T14:08:59Z |
|
dc.date.available |
2017-09-14T14:08:59Z |
|
dc.date.issued |
2006 |
|
dc.identifier.citation |
Grabowski, D.; Platte, D.; Hedrich, L.; Barke, E.: Time Constrained Verification of Analog Circuits using Model-Checking Algorithms. In: Electronic Notes in Theoretical Computer Science 153 (2006), Nr. 3, S. 37-52. DOI: https://doi.org/10.1016/j.entcs.2006.01.026 |
|
dc.description.abstract |
In this contribution we present algorithms for model checking of analog circuits enabling the specification of time constraints. Furthermore, a methodology for defining time-based specifications is introduced. An already known method for model checking of integrated analog circuits has been extended to take into account time constraints. The method will be presented using three industrial circuits. The results of model checking will be compared to verification by simulation. |
eng |
dc.language.iso |
eng |
|
dc.publisher |
Amsterdam : Elsevier BV |
|
dc.relation.ispartofseries |
Electronic Notes in Theoretical Computer Science 153 (2006), Nr. 3 |
|
dc.rights |
CC BY-NC-ND 3.0 Unported |
|
dc.rights.uri |
https://creativecommons.org/licenses/by-nc-nd/3.0 |
|
dc.subject |
Constraint theory |
eng |
dc.subject |
Integrated circuits |
eng |
dc.subject |
Mathematical models |
eng |
dc.subject |
Specifications |
eng |
dc.subject |
Analog Circuits |
eng |
dc.subject |
CTL |
eng |
dc.subject |
Model Checking |
eng |
dc.subject |
Time Constraints |
eng |
dc.subject |
Analog computers |
eng |
dc.subject.ddc |
004 | Informatik
|
ger |
dc.subject.ddc |
510 | Mathematik
|
ger |
dc.title |
Time Constrained Verification of Analog Circuits using Model-Checking Algorithms |
eng |
dc.type |
Article |
|
dc.type |
Text |
|
dc.relation.issn |
15710661 |
|
dc.relation.doi |
https://doi.org/10.1016/j.entcs.2006.01.026 |
|
dc.bibliographicCitation.issue |
3 SPEC. ISS. |
|
dc.bibliographicCitation.volume |
153 |
|
dc.bibliographicCitation.firstPage |
37 |
|
dc.bibliographicCitation.lastPage |
52 |
|
dc.description.version |
publishedVersion |
|
tib.accessRights |
frei zug�nglich |
|